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Logic Diagram ÷ 4 CTR + Decode Matr/Gate Cont Scientific Sequencer

Technical drawing showing the layout of logic diagram ÷ 4 ctr + decode Matr/Gate Cont scientific sequencer including logic gates, labeled scale drawings and explanatory notes.

Date: July 18, 1966

Creator: Kersh

Partner: Lunar Planetary Institute Library

Logic Diagram A7 ÷ 16 CTR/IX Call Logic Scientific Sequencer

Technical drawing showing the layout of logic diagram A7 ÷ 16 ctr/IX call logic scientific sequencer including logic gates, labeled scale drawings and explanatory notes.

Date: 1966

Partner: Lunar Planetary Institute Library

Logic Diagram Arith & Memory Scientific Sequencer

Technical drawing showing the layout of logic diagram arith & memory scientific sequencer including logic gates, labeled scale drawings and explanatory notes.

Date: 1966

Creator: Goldsborough, E.

Partner: Lunar Planetary Institute Library

Interconnect Diagram DC/DC Converter LSM

Technical drawing showing the layout of interconnect diagram dc/dc converter LSM including labeled scale drawings and explanatory notes.

Date: March 3, 1967

Creator: Dean, Judith

Partner: Lunar Planetary Institute Library

Schematic Diagram Surge Suppressor Module, DC-DC Converter, A13

Technical drawing showing the layout of schematic diagram surge suppressor module, dc-dc converter [A13] including labeled scale drawings and explanatory notes.

Date: 1967

Partner: Lunar Planetary Institute Library

Schematic Diagram Regulator Module, DC/DC Converter, A14

Technical drawing showing the layout of schematic diagram regulator module, dc/dc converter [A14] including labeled scale drawings and explanatory notes.

Date: March 3, 1967

Creator: Dean, Judith

Partner: Lunar Planetary Institute Library

Schematic Diagram Output Module DC-DC Converter

Technical drawing showing the layout of schematic diagram output module, dc/dc converter [A15] including labeled scale drawings and explanatory notes.

Date: February 1967

Partner: Lunar Planetary Institute Library

Interconnect Diagram System Timer

Technical drawing showing the layout of interconnect diagram system timer including labeled scale drawings, revisions and explanatory notes.

Date: February 8, 1967

Creator: Scott, J.

Partner: Lunar Planetary Institute Library

Logic Diagram Pulse Rate Driver System Timer

Technical drawing showing the layout of logic diagram pulse rate driver system timer [A5] including logic gates, labeled scale drawings, revisions and explanatory notes.

Date: 1966

Creator: Petulla, A.

Partner: Lunar Planetary Institute Library

Schematic Diagram A7 Power Unit System Timer

Technical drawing showing the layout of schematic diagram A7 power unit system timer including labeled scale drawings, revisions and explanatory notes.

Date: 1967

Partner: Lunar Planetary Institute Library

Schematic Diagram A6 Timing Unit System Timer

Technical drawing showing the layout of schematic diagram A6 timing unit system timer including logic gates, transistors, labeled scale drawings, revisions and explanatory notes.

Date: 1967

Partner: Lunar Planetary Institute Library

Interconnect Diagram Site Survey/Flip Cal Programmer

Technical drawing showing the layout of interconnect diagram site survey/flip cal programmer including labeled scale drawings, revisions and explanatory notes.

Date: 1967

Creator: Godfrey, S. W.

Partner: Lunar Planetary Institute Library

Wiring Diagram Site Survey/Flip Cal Prog

Technical drawing showing the layout of wiring diagram site survey/flip cal prog including labeled scale drawings, revisions and explanatory notes.

Date: 1966

Partner: Lunar Planetary Institute Library

Logic Diagram A1 Reset & Control Site Survey/Flip Cal Program

Technical drawing showing the layout of logic diagram A1 reset & control site survey/flip cal program including logic gates, labeled scale drawings, revisions and explanatory notes.

Date: 1966

Partner: Lunar Planetary Institute Library

Logic Diagram Offset Ctr & Control No 2 Site Survey/Flip Cal Program

Technical drawing showing the layout of logic diagram offset ctr & control no 2 site survey/flip cal program including logic gates, labeled scale drawings and explanatory notes.

Date: 1966

Creator: Goldsborough, E.

Partner: Lunar Planetary Institute Library

Logic Diagram A3 Flip Counter & Clock Buffer Site Survey/Flip Cal Program

Technical drawing showing the layout of logic diagram A3 flip counter & clock buffer site survey/flip cal program including logic gates, labeled scale drawings, revisions and explanatory notes.

Date: 1966

Partner: Lunar Planetary Institute Library

Logic Diagram A4 Offset Control No1 & No3 Site Survey/Flip Cal Prog

Technical drawing showing the layout of logic diagram A4 offset control no1 & no3 site survey/flip cal prog including logic gates, labeled scale drawings, revisions and explanatory notes.

Date: August 6, 1966

Creator: Goldsborough, E.

Partner: Lunar Planetary Institute Library

Logic Diagram A5 Reversal Control Logic Site Survey/Flip Cal Prog

Technical drawing showing the layout of logic diagram A5 reversal control logic site survey/flip cal prog including logic gates, labeled scale drawings, revisions and explanatory notes.

Date: 1966

Partner: Lunar Planetary Institute Library

Logic Diagram A6 Raster Counter Site Survey/Flip Cal Program

Technical drawing showing the layout of logic diagram A6 raster counter site survey/flip cal program including logic gates, labeled scale drawings, revisions and explanatory notes.

Date: 1966

Partner: Lunar Planetary Institute Library

Logic Diagram A7 Program Ctr & Decode Matrix Site Survey/Flip Cal Program

Technical drawing showing the layout of logic diagram A7 program ctr & decode matrix site survey/flip cal program including logic gates, labeled scale drawings, revisions and explanatory notes.

Date: 1966

Partner: Lunar Planetary Institute Library

Diagram Wiring & Interconnect Arithmetic

Series of technical drawings showing the layout of diagram wiring & interconnect arithmetic including labeled scale drawings, revisions and explanatory notes.

Date: 1966

Partner: Lunar Planetary Institute Library

Logic Diagram 2 Bit Accumulator Arithmetic Unit

Technical drawing showing the layout of logic diagram 2-bit accumulator arithmetic unit including logic gates, labeled scale drawings and explanatory notes.

Date: April 1, 1966

Partner: Lunar Planetary Institute Library

Logic Diagram 8 Bit Register Arithmetic Unit

Technical drawing showing the layout of logic diagram 8-bit regulator arithmetic unit including logic gates, labeled scale drawings and explanatory notes.

Date: April 5, 1966

Partner: Lunar Planetary Institute Library

Logic Diagram Acc Sign Bit Arithmetic Unit

Technical drawing showing the layout of logic diagram acc sign bit arithmetic unit including logic gates, labeled scale drawings and explanatory notes.

Date: April 10, 1966

Partner: Lunar Planetary Institute Library

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